1. Technical Field
The present invention relates generally to Flash memory devices and more particularly to Flash memory devices using nanoncrystals.
2. Background Art
The increasing use of portable electronics and embedded systems has resulted in a need for low-power high-density non-volatile memories that can be programmed at very high speeds. One type of memory, which has been developed, is Flash electrically erasable programmable read only memory (Flash EEPROM). It is used in many portable electronic products, such as personal computers, cell phones, portable computers, voice recorders, etc. as well as in many larger electronic systems, such as cars, planes, industrial control systems, etc.
A Flash EEPROM device is formed on a semiconductor substrate. In portions of the surface of the substrate, a doped source region and a doped drain region are formed with a channel region therebetween. A tunnel silicon oxide dielectric layer is formed on the semiconductor substrate over the channel region and between the source and drain regions. Above the tunnel silicon oxide dielectric layer, over the channel region, a stacked-gate structure is formed for a transistor having a floating gate layer, an inter-electrode dielectric layer, and a control gate layer. The source region is located on one side of the stacked gate structure with one edge of the source region overlapping the gate structure. The drain region is located on the other side of the stacked gate structure with one edge overlapping the gate structure. The device is programmed by hot electron injection and erased by Fowler-Nordheim tunnelling.
A silicon (Si) nanocrystal Flash EEPROM device has been proposed that can be programmed at fast speeds (hundreds of nanoseconds) using low voltages for direct tunneling and storage of electrons in the silicon nanocrystals. By using nanocrystal charge storage sites that are isolated electrically, charge leakage through localized defects in the gate oxide layer is presumably reduced.
A germanium (Ge) nanocrystal Flash EEPROM device has also been demonstrated that can be programmed at low voltages and high speeds. Such a device was fabricated by implanting germanium atoms into a silicon substrate. However, the implantation process can cause germanium to locate at the silicon-tunnel oxide interface, forming trap sites that can degrade the device performance. The presence of such trap sites places a lower limit to the thickness of the resulting tunnel oxide, because defect-induced leakage current in a very thin tunnel oxide can result in poor data retention performance.
Solutions to these problems have been long sought, but have long eluded those skilled in the art.
The present invention provides a Flash memory having a trilayer structure of rapid thermal oxide (RTO)/germanium (Ge) nanocrystals in SiO2/sputtered SiO2 cap. This structure has been demonstrated with via capacitance versus voltage (C-V) measurements having memory hysteresis due to germanium nanocrystals in the middle layer of the trilayer structure. The Ge nanocrystals are synthesized by rapid thermal annealing (RTO) of co-sputtered Ge+SiO2 films.
The present invention provides a method for obtaining a Flash memory structure of Ge nanocrystals synthesized by RTA technique and discloses that the Ge nanocrystal growth is critically dependent on the Ge concentration and the rapid thermal anneal RTA processing conditions.
Certain embodiments of the invention have other advantages in addition to or in place of those mentioned above. The advantages will become apparent to those skilled in the art from a reading of the following detailed description when taken with reference to the accompanying drawings.